Gallium Nitride (GaN) based high-electron mobility transistors (HEMTs) are very promising candidates for high power radiofrequency (RF) applications, and also for low frequency high power switching applications since the material properties of GaN enable achievement of high voltage and high current. However, an important issue in these devices is the design of the buffer layer to achieve high voltage capability. Many designs currently use deep level impurities such as iron (Fe) or carbon (C) to minimize current flow through the buffer layer at high drain voltage conditions. However, both Fe and C lead to drain lag effect, which is the slow recovery of drain current when the drain voltage is changed from a high value to a lower one. This is very undesirable for both power and RF applications since it leads to lower switching current, lower efficiency, and other problems. The drain lag effect may be eliminated by using high purity buffer layers without Fe or C. However, these devices have high leakage current through the buffer layer which is also not acceptable.
Accordingly, there is a need for an alternative solution to addressing lag effect in GaN HEMTs.